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CPU Stress Testar Anonymous 03/12/2019 (Tue) 21:28:24 [Preview] No. 13221
Thats mathematical!
Get those branch predictors moving!
Out of order executing to the rescue!

Activate the most CPU transistors with the least amount of Instructions?
This means Memory Controller(Read/Write), Integrated GPU, Multicore(SIMD?), Peripheral(USB/PCI/Etc.) controllers(What was once the North/South Bridges...), Intel ME/AMD PSP?, L1/2/3 Caches (Some Reverse Engineering Here...), Branch Predictors/Out-Of-Order(Deeper... Programs that would benefit from such technologies?(If/Else?...)), CPUID ROM, Microcode Memory?, Floating-Point(Double/Highest Precision)+Integer Units, Instruction Decoding(Complexity=Better?), Registers(MOVing?), Herp Derp Intel "Technologies"(AMT, vPro, Hyperthreading, VTd, Etc...) and other parts of the CPU...

Determine what instructions result in the greatest total activation?

You could write a simple C program like "main(){while(1)} to hang the CPU, but we want to push it as greatly as possible!

Anonymous 03/21/2019 (Thu) 10:43:02 [Preview] No.13228 del
Hey guise I also just read "Computer Architecture: A Quantitative Approach" and want to use my new vocab!
Here's my l33t way to get those branch predictors pumping!
'time emerge --oneshot coreutils'
You can also try lm-sensors!

Anonymous 03/22/2019 (Fri) 01:12:12 [Preview] No.13231 del
Your an idiot if you think this was a way for me to boast my knowledge. I would have gone on plebbit if I wanted to do that. What I am achieving here is the greatest amount of current flowing through my CPU with the least amount of instructions, to break it down at the "normal" frequencies set by the manufacturer, finding silicon imperfections if you will, might even find some unintended behavior!

Anonymous 03/31/2019 (Sun) 14:46:20 [Preview] No.13247 del
int i=0;


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